Design Demo of Discrete MOSFET Paralleling

MOSFET parallelling is needed for high current and high power applications. Parallel operation of SiC MOSFETs offers lower cost, more flexible design and multiple sources. However, there are challenges facing the designers – unbalanced current sharing due to parametric variance such as turn-on threshold voltage and asymmetrical PCB layout, leading to thermal unbalance issue and potential early failure of parts. Therefore, factors affecting current sharing among discrete MOSFETs in parallel need to be studied and countermeasures are desired.

The Design Accomplishes:

• PCB layout which possesses balanced parasitic inductances for three MOSFETs in parallel
• Good current sharing among the three MOSFETs in parallel has been achieved despite significant difference among turn-on threshold voltages

Specifications:

• 2-level, three TO-247-4L SiC MOSFETs in parallel, BUCK-BOOST in open-loop operation
• Power devices: C3M0040120K
• Input voltage: 650 VDC – 750 VDC
• Output current: 85 ARMS (Max.)
• Power: 33 kW (Max.)
• Peak efficiency: > 99%
• Frequency: 40 kHz
• Temperature: -40 to 85 °C (Heatsink)